DESCRIPTION
A number of supported system architectures allow the behaviour of the CPU cache to be programmed to behave differently depending on the region being written. The memcontrol utility provides an interface to this facility, allowing CPU cache behavior to be altered for ranges of system physical memory.
These ranges are typically power-of-2 aligned and sized, however the specific rules governing their layout vary between architectures. The memcontrol utility does not attempt to enforce these rules, however the system will reject any attempt to set an illegal combination.